[1]
S. K. Pittala and A. J. Rani, “Design of an Energy Efficient Multiplier Using Complementary Energy Path Adiabatic Logic”, The Annals of “Dunarea de Jos“ University of Galati. Fascicle III, Electrotechnics, Electronics, Automatic Control, Informatics, vol. 40, no. 1, pp. 27-32, Jun. 2017.