Dual Priority Scheduling Algorithm Used in the nMPRA Microcontrollers – Dynamic Scheduler

  • Lucian ANDRIEȘ “Ștefan cel Mare” University of Suceava
  • Vasile Gheorghiță GĂITAN “Ștefan cel Mare” University of Suceava
Keywords: real time system, dynamic hardware scheduler, microcontroller, pipeline processor

Abstract

This paper is a follow up of an already published paper that described the static scheduler. It deals with a true dynamic scheduling algorithm that is meant to maximize the CPU utilization. The dual priority algorithm is composed of two different scheduling algorithms, earliest deadline first (EDF) and round robin (RR). We have chosen EDF, because it is a dynamic scheduling algorithm, used in real time operating systems, which can be easily implemented in hardware, by improving the nHSE architecture. The new dynamic scheduler algorithm provides a much better CPU utilization, very good switching time for tasks and events within 5 to 8 machine cycles and guarantees that no task will suffer from starvation.

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References

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Published
2015-06-15
How to Cite
1.
ANDRIEȘ L, GĂITAN VG. Dual Priority Scheduling Algorithm Used in the nMPRA Microcontrollers – Dynamic Scheduler. The Annals of “Dunarea de Jos” University of Galati. Fascicle IX, Metallurgy and Materials Science [Internet]. 15Jun.2015 [cited 28Mar.2024];38(2):66-1. Available from: https://www.gup.ugal.ro/ugaljournals/index.php/mms/article/view/1359
Section
Articles